JEDEC Solid State Technology Association has announced the release of JEP200, a new test method designed to measure switching energy loss in semiconductor power devices. Developed by the JC-70.1 Gallium Nitride and JC-70.2 Silicon Carbide subcommittees, this essential method addresses the challenges posed by soft-switching power conversion systems and helps optimize energy efficiency.
Addressing Efficiency in Power Converters
The JEP200 test method offers a standardized approach for measuring the energy stored in a power device’s output capacitance. This energy significantly impacts the efficiency of power converters, making accurate testing essential for system optimization. Developed with input from both academia and industry professionals, JEP200 outlines detailed testing circuits, methods, and algorithms to quantify switching energy losses due to output capacitance hysteresis.
Applicability Across Multiple Power Devices
JEP200 is applicable to a range of power devices, including wide bandgap semiconductors like Gallium Nitride (GaN) and Silicon Carbide (SiC), as well as traditional silicon transistors and diodes. This broad applicability ensures the standard meets the needs of the entire power semiconductor industry.
Industry Collaboration and Impact
Dr. Jaume Roig from onsemi emphasized the importance of the standardized test, noting that it provides the much-needed clarity for high-frequency power conversion systems. The JC-70 committee continues to respond swiftly to industry needs, ensuring continued innovation in power device design.
The JEP200 document is available for free download on the JEDEC website. The next JC-70 committee meeting will be held on November 6, 2024, at the WiPDA Conference in Dayton, Ohio.
Source: businesswire.com
